A High-Power, Class-AB, MMIC Amplifier for Base Stations
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By Sergei Kent, Richard Frey and David Osika, ANADIGICS, Inc. Base station amplifier designs can benefit from MMIC technologies to increase manufacturability while reducing overall cost and size. Wireless subscribers are expected to grow worldwide and to exceed 600 million in the year 2000 (Cahners In-Stats). In order to support this growth, new base station installations must also increase. Much of this growth is expected to use linear modulation formats as well as GSM. In addition to installing base stations in new areas, multiple modulation standards are also being introduced into existing areas, overlaying or overlapping the older standards. As a result, new base station amplifiers are being redesigned to be smaller, lower cost and more manufacturable. In order to achieve this goal, components with a higher level of integration and offering automated, surface-mount assembly capability are desirable. In the handset marketplace, this redesign has been achieved in many cases by replacing discrete amplifier chains with multi-stage MMIC circuits, in plastic, surface-mount packages. This paper describes how the design and development considerations, used for the handset amplifier market, can be successfully applied to create higher power MMIC devices for base station applications. As a result, ANADIGICS has developed two GaAs-based MMIC's (AWT921 and AWT1921) for use in base stations and other fixed terminals. Design Considerations The first step of the design approach was to analyze the possible adaptation of the existing GaAs MMIC technology, packaging, and manufacturing techniques used for handset power amplifiers to base station applications, previously dominated by discrete device solutions. This led to a decision to develop an integrated high-power amplifier (IHPA) with multiple gain stages. It was determined that the IHPA MMIC should contain as much of the circuitry (RF matching and DC biasing) on chip as possible. Three primary features targeted for this part were to achieve higher output-power levels, at higher operating voltages, in a surface mount plastic package. These performance requirements translated, in turn, to specific device requirements. For the designer to be able to take advantage of the higher voltages available in fixed-terminal applications, the new device needed to have a sufficient breakdown voltage. The higher output-power requirements meant that improvements in device thermal resistance would also be necessary. Defining the gain and output saturation point of the amplifier along with the targeted operating voltage allows the designer to start assembling a block diagram of the amplifier along with partitioning the gain in each stage. GaAs MMIC technology incorporates on-chip inductors, capacitors, and resistors, which allow matching, biasing, and stabilizing elements to be placed on chip. The designer must decide which passive components should be placed on chip versus which ones should be made external to the die. This choice is based on such tradeoffs as Q-factor requirements of inductors versus circuit losses, capacitor size versus die area or cost, and on-chip versus off-chip bias-resistor values which allows design flexibility for various applications. In addition, much of the DC biasing circuitry can be placed on chip as well, greatly simplifying and reducing the component count required in the final application. A simplified block diagram for the amplifier is shown in Figure 1. This is the AWT921 IHPA, which was developed for use in applications from 800 to 1000 MHz.
Figure 1. Simplified AWT921S11 block diagram showing partitioning of on- and off-chip components. Chip Design A primary consideration in the overall die layout and placement of active areas was to allow for multiple source ground wires to help maximize the available gain obtained from each stage of this design. The drain connections also needed to be optimized to obtain a low inductive path for impedance matching and to maintain sufficient current handling ability. An on-chip, active-bias topology was chosen, similar to the one used on ANADIGICS MMIC amplifiers for handset terminal applications, to provide manufacturing margin for device threshold-voltage shifts. Even minimal shifts in these threshold voltages can result in significant variations in bias currents on large FET-based amplifiers. The system designers using this part will determine at design time what value of external resistors are required to set up optimum amplifier quiescent current for the given application. Only nominal, +/-10%, positive and negative reference voltages need to be supplied to this circuit to bias the amplifier to its targeted levels. The significance of this circuit is that in production, no selections of components are needed, and no adjustments are required, allowing high volume manufacturing techniques to be applied. The device and process used for this design also had to be optimized for the higher voltage operation. By modifying the device substructure and channel impurity profile, a BVgd in excess of 30 volts was achieved. The active device area was also laid out to lower the thermal resistance contributed from the GaAs die. Packaging
Figure 2. Device assembly cross-section which shows the thermally-enhanced package mounted on a multi-layer, FR4 board.
Figure 3. An SSOP, 28-Lead, Wide-Body Package. Another critical element of the design is the package since it significantly affects the thermal resistance and cost. In order to meet these criteria, a plastic, SSOP-style package was selected. The package was modified to incorporate a relatively large, metal slug attached to the bottom of the leadframe. The bottom of the slug is exposed to provide a good electrical ground and a heat removal path to the PC board. The PC board is designed with multiple via holes, in order to insure good heat flow to the heat sink. These holes also provide for a good electrical ground return path. A cross section of the package is shown in Figure 2. The AWT921 design achieved a typical thermal resistance of 4.5 degrees C/Watt. An outline of the final SSOP28 package is shown is Figure 3. Since a base station application usually requires continuous operation, the PC board temperature can reach as high as 85 degrees centigrade. When biased for linear operations, the AWT921 dissipates ~12 watts. Therefore the junction temperature is typically less than 150 degrees centigrade. Reliability testing at ANADIGICS predicts that at this junction temperature, the MTF will be greater than 106 hours (see Figure 4).
Figure 4. MTF vs. Channel and Case temperature for ANADIGICS, Power MESFETs. Performance As a result of above considerations, the AWT921 was developed and characterized for linear base station applications. The class-AB, power-transfer characteristics of the amplifier along with the associated PAE are shown in Figure 5. The AWT921 has a compressed power capability above +39 dBm, which allows excellent linear characteristics up to the 5-watt (+37 dBm) level. Optimum load tuning for both frequency response and transfer characteristics can be achieved with an off-chip, LC-matching topology which requires placing a shunt capacitor on the output transmission line.
Figure 5. 960 MHz measured and simulated Pout and efficiency vs. Pin of the MMIC PA at 8.5 volts. The 3-stage amplifier provides ~30 dB of gain and the intermodulation distortion products are shown in Figure 6.
Figure 6. Intermodulation products with 10-KHz tone spacing optimized at 881 MHz. A summary of typical performance levels for the AWT921S11 are listed in Table 1. Table 1. Performance summary for the AWT921S11 900-MHz Base Station Amplifier
Note 1 - Thermally enhanced slug package |
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