A SiGe PA Module for CDMA Applications
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By David Osika, Michael Mitzen, William Reinisch, and Chi-Wen Chang, ANADIGICS, Inc. Andreas Schüppen, TEMIC Semiconductors, an Atmel Company Abstract The high growth in wireless handsets has generated many opportunities for analog circuit suppliers. Handset designs have specific targets for cost, features, mechanics, and electrical performance. The designer will face many choices when planning the RF analog section of a phone and no one solution or technology has been shown to be best suited for all applications. Other business and manufacturing concerns must be included in the selection of RF components to minimize risk and time to market. Power amplifiers that are offered in a multi chip module (MCM) which contains the necessary RF circuitry and are fully matched to 50 ohms reduce these concerns. The power amplifier block is one component, which is currently being supplied by various manufactures using different semiconductor technologies. SiGe is a technology being considered for the analog transmit and receive section of wireless handsets. Specifically this paper reports on the design and characterization of a 6x6 mm SiGe power amplifier MCM for CDMA applications. I. Overview The development and deployment of 3G wireless systems is currently being undertaken to improve the high bandwidth capabilities required by future handsets. To facilitate the seamless coverage that is expected in today's handsets prior to full 3G systems deployment multi network phones would be required. This allows backward compatibility to existing IS-95 cellular networks and makes economic use of existing infrastructure. A dual band tri mode approach to handset design is in use in today's handset market. This paper discusses the design approach and results from the development of a SiGe cellular band CDMA power amplifier housed in a multi chip module (MCM). Additional work on a wideband 3G CDMA module has also been undertaken and final results are not yet available. II. SiGe HBT Technology TEMIC Semiconductors' SiGe1 IC process was developed for RFIC's with application voltages Vc = 1.5-5.5V, and is currently in production at TEMIC Semiconductors [1]. The double poly process offers npn HBTs with and without selectively implanted collector (SIC) on the same wafer. The main technological advance of the technology is the differential epitaxial growth of the SiGe layer after a standard recessed LOCOS process and using the SiGe-poly - poly 1 for the base contact and for two of the three resistor types. In contrary to other SiGe technologies and standard bipolar transistors the staircase doping profile of a highly doped emitter, medium doped base and low doped collector is exchanged by a medium doped emitter and a high doped base. This improves the transistor RF performance for wide emitter stripes, due to the low base sheet resistance down to 1.5k /. The patented self-aligned emitter module has an inside and an outside spacer and an additional amorphous Silicon layer, which is used to perform the emitter and the collector contacts. In addition, spiral inductors, nitride capacitors, three types of polysilicon resistors, a lateral PNP transistor, RF and DC-ESD protection, and varactor diodes are incorporated in the present technology.
Table 1. Key SiGe Performance Parameters The SiGe 1 technology is comparable in terms of number of masks and process costs to a standard double poly Si BJT process. Therefore this technology provides an ideal platform for large scale integration (LSI) RFIC's [2]. The process has recently been fully qualified based on device lifetime and packaged circuit lifetimes. Besides a couple of demonstrator circuits, e.g. an LNA at 5.8GHz with a noise figure of 1.6dB and an associated gain of above 20dB [2], a 2:1 Multiplexer at 40 Gbit/s, a 4.8 GHz - 2V VCO having a phase noise of -100 dBc/Hz at 100 kHz off carrier, the first SiGe1 products are still on the market. The U7006B is a DECT frontend, which yields an LNA noise figure of 1.6dB and 41% PAE for the PA at 1.9GHz. In addition, the LNA´s TST0950 and TST0951 are fabricated for GSM and DCS/PCS handsets. However, the highest benefit will have the SiGe1 technology for low voltage power amplifier. The reason for that is the reduced band gap, which lowers nearly exclusive the base-emitter band step. Hence the output characteristics are very steep in the saturation region, which helps for large signal amplification at low dc operation points. SiGe1 attained 72% PAE at 900 MHz and 65% at 1.9GHz for 0.5 Watt power transistors [4]. The first complete integrated three stage GSM power amplifier product TST0912 yielded 52% PAE and up to 35dBm output power. [4] A triple band amplifier TST0911 will follow in the early 2000. III. Design Methodology The primary goal of this effort was to evaluate SiGe HBT technology for handset power amplifier applications. The two telecom standards chosen were IS-95 Cellular CDMA and 3G Wideband CDMA. In order to determine the power performance capabilities of a SiGe HBT technology a full amplifier design was realized. A bipolar technology, such as the TEMIC SiGe, offers several advantages, such as single supply operation (eliminating the need for negative bias generators) and elimination of a drain switch. In addition, SiGe allows a future growth path to higher levels of integration when it is incorporated in a BiCMOS technology. A block diagram of the module is shown in Figure 1.
Figure 1. Block Diagram (6 X 6 mm MCM) All necessary critical RF matching components are included either on the module substrate or inside the SiGe die, providing 50 ohm RF connections in and out. DC connections are required for Vbattery and Vbias connections as indicated in Figure 1. Table 2 summarizes some of the key features and target specifications for the module. Electrical and thermal design of the substrate was performed in parallel with the SiGe chip, allowing the overall module footprint to be significantly reduced by optimizing component selection and their respective integration. The goal of the module was to have a package outline of 6x6 mm and a height less than 2mm, which was achieved. Due to inherent limitations of components fabricated on the silicon substrate, optimum performance is achieved by integrating the RF chokes and low frequency bypass capacitors on the module substrate. All input and interstage matching as well as the bias circuits are included on the die. The required 50 ohm output impedance is obtained by using an L-C matching circuit with higher Q elements placed on the substrate in order to reduce circuit losses and maximize performance.
Table 2. MCM Design Targets IV. Performance Summary Figures 2, 3 and 4 demonstrate module performance under IS-95 CDMA modulation conditions. Performance targets for gain, Pout and PAE (Power Added Efficiency) were either met or exceeded. Spectral performance of the module indicating acceptable linearity (ACP ~ 42 dBc) is shown in figure 4.
Figure 2. Pout, Gain and PAE vs. Pin
Figure 3. Large Signal Gain vs. Frequency
Figure 4. Amplifier Spectral Output, f= 836 MHz, Pout=27 dBm V. Conclusion A MCM power amplifier utilizing SiGe HBT technologies was characterized with Cellular CDMA modulation and provided 27 dBm of output power with acceptable adjacent channel interference. Future SiGe PA designs should target linearity improvement at higher power levels typically required in today's handsets. The realization of this fully matched module was accomplished in a 6x6mm footprint requiring only minimal external circuitry. Ongoing development efforts by the semiconductor industry will continue to improve device capability and performance levels of SiGe leading to it's increased use and new opportunities in RF analog products. References
[1] A. Schüppen, H. Dietrich, S. Gerlach, H. Höhnemann, J. Arndt, U. Seiler, R. Götzfried, U. Erben, H. Schumacher
[2] A. Schüppen, H. Dietrich, U. Seiler, H.v.d. Ropp, U. Erben
[3] U. Erben, H. Schumacher, A. Schüppen, J. Arndt
[4] D. Barlas, G. Henderson, X.Zhang, M. Bopp and A. Schüppen Paper originally presented at the Wireless Symposium, San Jose, California, February 22-25, 2000 |
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