High Power GaAs MMIC Amplifiers for Base Station Applications

By David M. Osika and Harjit Sanghera, ANADIGICS, Inc.

The increasing demand for cellular and PCS services has produced explosive rates of growth for handset manufactures and consequently base station deployment must keep pace to maintain and expand network capacity.

Wireless subscribers are expected to grow worldwide and exceed 450 million in the year 2000. A consequence of this growth in terminals is that the capacity requirements of base stations must grow accordingly. This growth can be achieved through increased system capacity by utilizing newer technologies such as CDMA, adaptive antenna, and hierarchical cell structures. Regardless of system improvements to increase individual cell site capacities, expanded geographical coverage must be obtained through additional macro, micro, and pico cell site installations. Higher volume manufacturing of base stations will be required to meet these goals and a more consumer like manufacturing environment will need to be adopted to maintain delivery rates cost effectively.

Surface mount components eliminate the need for semiautomatic or manual assembly operations which at certain volume levels become impractical. Utilizing standard parts and RF amplifiers designs will allow manufactures to minimize design and component purchasing to be done in high volumes. These factors are prime requirements for effectively applying a MMIC technology to a product. GaAs MMIC power amplifiers are currently used in handset or terminal designs up to the 3 watt level and have proven to be a cost effective solution. The same design and development tools and techniques which generated this market can be applied to fixed installations to provide solutions for driver sections in macro base stations and also act as the final amplifier in micro cells.

Design Considerations

A detailed review of the electrical and thermal capabilities of high volume GaAs MMIC technologies and packaging produced the initial design targets for the ANADIGICS Inc. (Warren NJ) AWT921S11 which is a 900 MHz high power MMIC amplifier. Three primary features, targeted for this part, were to achieve an output power of +39 dBm with an associated gain of 30 dB in a surface mount plastic package. Defining the output saturation point of the amplifier along with the targeted operating voltage allow the designer the framework to start assembling a block diagram of the amplifier along with partitioning of gain in each stage.

GaAs MMIC technology also incorporates on chip inductors, capacitors, and resistors which allow matching, biasing and stabilizing elements to be placed on chip. The designer must decide which passive components should be placed on chip verses which ones to make external to the die. This choice is based on such tradeoffs as Q-factor requirements of inductors verses circuit losses, capacitance densities verses die area or cost and choosing which resistor values to place on chip verses off which allows design flexibility for various applications. A simplified block diagram for the amplifier is shown in Figure 1.

The GaAs MESFET model that was used for simulations is a four terminal model which is described by Scheinberg, et al. [1] and allows concurrent prediction of both RF and DC parameters. Large signal RF performance was optimized with HP EEsof 's LIBRA™ which incorporated this model along with the active bias circuit which can influence circuit operation. Proper assumptions of package and assembly parasitics is critical at these high power levels and low device impedances to predict device performance.

Chip Design

A primary consideration in the overall die layout and placement of active areas was to allow multiple source ground wires to help maximize the available gain obtained from each stage of this three stage design. The drain connections also need to be optimized to obtain a low inductive path for impedance matching and to maintain sufficient current handling ability. An on chip active bias topology was chosen similar to the ones used on our MMIC amplifiers for terminal applications to provide manufacturing margin for device threshold voltage shifts which can occur. Even minimal shifts in these threshold voltages result in dramatic increases in bias currents on large FET amplifiers.

The system designers using this part will determine at design time what value of external resistors are need to set up optimum amplifier quiescent current for the given application. Only nominal +/-10% positive and negative reference voltages need to be supplied to this circuit to bias the amplifier to its targeted levels. The significance of this circuit is that in production no selections of components will be needed or adjustments be required allowing high volume manufacturing techniques to be applied.

Thermal Analysis

Overall thermal resistance of the amplifier must be balanced with the power dissipation, maximum operating temperature of the part, and reliability requirements. The product life cycle for base station and fixed wireless applications is much longer than terminals and field failures are costly, therefore a highly reliable device is required.

Outdoor installation of Base Stations mounted in equatorial regions can require components to sustain operation at 85°C case temperatures. To ensure continuous operation component reliability MTF values in excess of 106 hours are necessary and this has been satisfied by the AWT921S11. The power and efficiency characteristics of the amplifier indicate that maximum power dissipation occurs in the device at saturation and is 12 watts. RF lifetest data taken on ANADIGICS power MESFETs indicate a maximum channel temperature of 157°C can be sustained while still maintaining a 106 hours of MTF as shown in Figure 2.

Now that the outer limits of the operating conditions are define the necessary overall thermal resistance of the amplifier and PCB can be defined as shown in Equation 1.

øja= (Tchan,max - Ta)/PDISS
= (157°C - 85°C ) / 12 watts
= 6 C/W [eq. 1]

Total thermal resistance path from the device channel to the heat sink can be broken down into three section which are the die, package, and multi-layer PCB. A thermally enhanced SSOP 28 pin 300 mil wide body package was chosen to house this high power amplifier and a cross section of the simplified assembly of this part is shown in Figure 3.

A SOIC 16 version of this package is currently in volume production and used for an ultra linear CATV line extender amplifier. This package has been qualified and is in full compliance with HAST, shock, vibration, and temp cycling testing. Figure 4 is a photograph showing the top and bottom of the package.

The proper size active device used as the output stage of this design is achieved through paralleling of smaller length gate fingers. Each finger acts as a heat generation site and adjacent fingers can influence and increase overall thermal resistance. An optimum tradeoff needs to be achieved between minimal thermal resistance and die size. Infrared scanning and finite element analysis shows the relationship between device gate-to-gate finger spacing or pitch and thermal impedance, which is plotted in Figure 5.

The graph shows thermal resistance for the entire package because it simplified the measurement and also allowed non uniform temperatures at the die-solder and die-slug interfaces to be modeled. A significant percentage of the total device thermal resistance is due to the PCB and this must be accounted for in this analysis since the user will be impacted by this additional component. Multiple ground vias are placed under the slug interface to pull heat away from the device and down to the heat sink resulting in a thermal resistance of less than 2 C/W. An important result of the simulations was that solder filled vias as opposed to copper increases the thermal resistance by as much as 12%. A cost-effective process for back filling drilled vias with copper does not appear present in today's manufacturing market place but work is being done in this area.

Performance

The class-AB power transfer characteristics of the amplifier along with the associated PAE are shown in Figure 6 for both the modeled and measured cases. Deviation of actual verses predicted results are attributed the significance of both losses and capacitive loading of the plastic encapsulation which was not fully accounted for in the simulation.

This amplifier has a compressed power capability above +39 dBm, which allows excellent linear characteristics at the 5 watt (+37 dBm) level. Optimum load tuning for both frequency response and transfer characteristics can be achieved with an off chip LC matching topology which requires placing a shunt capacitor on the output transmission line. Intermodulation distortion products are shown in Figure 7 for this amplifier when tuned for linearity and operating in the AMPS band (869-894 MHz).

A summary for typical performance levels for the AWT921S11 are listed in Table 1.

Table 1. Performance summary for the AWT921S11 900 MHz Base Station Amplifier

Note 1 – Thermally enhanced slug package
Note 2 – Total thermal resistance of die, package and application test board.
Note 3 – Tone spacing at 10 kHz.

References

[1] N. Scheinberg, R. Bayruns and P. Wallace, An Accurate MESFET Model for Linear and Microwave Circuit Design, IEEE J. Solid-State Circuits 24(2) April 1989.

An edited version of this article appeared in Wireless Systems Design (October 1997, Vol.2 No. 11. page 48) entitled "GaAs Power Amps Offer Design Options for Base-Station Applications"

AWT921 Data Sheet